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¿µ¹®Ç¥Áظí Standard for Software Verification and Validation
Çѱ۳»¿ë¿ä¾à º» Ç¥ÁØÀÇ ¸ñÀûÀº ¸ðµç ¼ÒÇÁÆ®¿þ¾î »ý¸íÁÖ±â ÇÁ·Î¼¼½º¸¦ Áö¿øÇÏ´Â V&V ÇÁ·Î¼¼½º, È°µ¿, ÀÛ¾÷À» À§ÇÑ °øÅë ÇÁ·¹ÀÓ¿÷À» ±ÔÁ¤ÇÏ°í V&V ÀÛ¾÷°ú ÀÌ¿¡ ¿ä±¸µÇ´Â ÀԷ°ú Ãâ·ÂÀ» Á¤ÀÇÇÑ´Ù. ±×¸®°í 4 ¼öÁØ Ã¼°è¸¦ ÀÌ¿ëÇÏ´Â ¼ÒÇÁÆ®¿þ¾î ¹«°á¼º ¼öÁØ¿¡ ´ëÀÀÇÏ´Â ÃÖ¼ÒÀÇ V&V ÀÛ¾÷À» ½Äº°ÇÏ°í ¼ÒÇÁÆ®¿þ¾î V&V °èȹÀÇ ³»¿ëÀ» Á¤ÀÇÇÑ´Ù.
¿µ¹®³»¿ë¿ä¾à The purpose of this standard is to define the content of Software V&V Plan(SVVP) and to establish a common framework for V&V process, activities, and tasks in support of all software life cycle process, including acquisition, supply, development, operation, and maintenance processes.
±¹Á¦Ç¥ÁØ IEEE 1012
°ü·ÃÆÄÀÏ 2000-072.zip 2000-072.zip            

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