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Ç¥ÁعøÈ£ TTAK.KO-10.0646 ±¸Ç¥ÁعøÈ£
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¿µ¹®Ç¥Áظí Interface for Energy Scalable Cache Controller
Çѱ۳»¿ë¿ä¾à º» Ç¥ÁØÀº ÀÓÀÇÀÇ ÇÁ·Î¼¼¼­°¡ ¿¡³ÊÁö Àý°¨Çü ij½Ã Á¦¾î±â¸¦ ¼³Á¤Çϱâ À§ÇØ ¾Ë¾Æ¾ß ÇÏ´Â ÀÎÅÍÆäÀ̽º ±Ô°Ý°ú ij½Ã ¸Þ¸ð¸® Å©±â ¹× ij½Ã µ¿ÀÛ ¸ðµå¸¦ ¼³Á¤Çϱâ À§ÇÑ ³»ºÎ ·¹Áö½ºÅ͸¦ Á¤ÀÇÇÑ´Ù. À̸¦ ÅëÇØ ÀÓÀÇÀÇ ÇÁ·Î¼¼¼­¿¡¼­ µ¿ÀÛÇÏ´Â ¼ÒÇÁÆ®¿þ¾î´Â ¿¡³ÊÁö Àý°¨Çü ij½Ã Á¦¾î±â¸¦ ¼³Á¤ÇÒ ¼ö ÀÖ°í ij½Ã Àü·Â ¼Ò¸ð¿Í ¼º´É Á¶ÀýÀÌ °¡´ÉÇÏ´Ù.
¿µ¹®³»¿ë¿ä¾à This standard defines the interface, cache memory size and internal registration to set up active mode on cache. Through this, software run by certain processor could set up energy scalable cache controller which make possible to control power consumption and performance.
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