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Ç¥ÁعøÈ£ TTAK.KO-10.0581 ±¸Ç¥ÁعøÈ£
Á¦°³Á¤ÀÏ 2012-10-09 ÃÑÆäÀÌÁö 16
ÇѱÛÇ¥ÁØ¸í ½ºÅ©·¡Ä¡ ÆÐµå ¸Þ¸ð¸®¸¦ ÀÌ¿ëÇÑ Ä³½Ã ¸Þ¸ð¸® ÀÎÅÍÆäÀ̽º
¿µ¹®Ç¥Áظí Cache Memory Interface with the Scratch Pad Memory
Çѱ۳»¿ë¿ä¾à º» Ç¥ÁØÀº ÇÁ·Î¼¼¼­¿Í ½ºÅ©·¡Ä¡ ÆÐµå ¸Þ¸ð¸®¸¦ ±¸ºñÇÏ°í Àִ ij½Ã ¸Þ¸ð¸® °£¿¡ Àü·Â Á¶ÀýÀ» À§ÇÑ ÀÎÅÍÆäÀ̽º ±Ô°ÝÀ» Á¤ÀÇÇÏ¿© ÇÁ·Î¼¼¼­¿Í ¸Þ¸ð¸® °£ÀÇ Åë½ÅÀ¸·Î ÀÎÇÑ Àü·Â ¼Ò¸ð¸¦ ÃÖ¼ÒÈ­ ÇÒ ¼ö ÀÖµµ·Ï ÇÏ°íÀÚ ÇÑ´Ù.
¿µ¹®³»¿ë¿ä¾à The object of this standard is to define the interface for reducing the power consumption between cache memory with the scratch pad memory and processor.
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